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IEEE Begins Standard For Esterel Reference Manual

IEEE

PISCATAWAY, N.J., USA — April 12, 2007

The IEEE has begun work on IEEE P1778™ Standard for Esterel v7 Language Reference Manual, a standard that will stabilize and fully define the syntax and semantics of this language. Esterel v7 expresses the interaction of hardware, software and temporal synchronization and helps increase design efficiency and reliability for semiconductor and other embedded systems. It is scheduled for completion in mid 2008.

Esterel v7 designs are typically 3 to 5 times smaller than those based on hardware description languages (HDL) or C software, and so are usually easier to develop, verify and communicate. This language is interoperable with other standards because it generates both synthesizable HDL code, such as Verilog and VHDL, and executable software code in C, C++, SystemC and other packages. Since it offers equivalent hardware and software targets from a single source, it builds confidence in computer-based hardware simulation and speeds decision making in hardware and software implementation.

IEEE P1778 will give the electronic design automation, semiconductor, systems design and software communities a standard Esterel v7 language, says Gérard Berry, Chair of the Esterel v7 Language Reference Working Group and Chief Scientist of Esterel Technologies. This reference manual will ensure the full interoperability among Esterel-based compilation, circuit synthesis, static analysis and verification tools.

Esterel v7 gives users a higher level of abstraction than do other languages by integrating such areas as the sequencing found in software languages, large-scale hardware description languages, and support for multiclock designs. It can be translated to hardware circuit descriptions written in standard HDLs or to equivalent software code.

The Esterel Consortium developed the Esterel v7 language by adding hardware design features to Esterel v5, a version formulated in academia. IEEE P1778 is part of the IEEE’s broad electronic design automation activities effort that include seven VHDL standards, three Verilog HDL standards, the SystemC language reference manual, and standards for the Property Specification Language and the Functional Verification Language 'e'.

IEEE P1778 is sponsored by the IEEE Computer Society, Design Automation Standards Committee.

About the IEEE Standards Association

The IEEE Standards Association, a globally recognized standards-setting body, develops consensus standards through an open process that brings diverse parts of an industry together. These standards set specifications and procedures based on current scientific consensus. The IEEE-SA has a portfolio of more than 870 completed standards and more than 400 standards in development. Over 15,000 IEEE members worldwide belong to IEEE-SA and voluntarily participate in standards activities. For information on IEEE-SA see: www.standards.ieee.org.

About the IEEE

The IEEE has more than 375,000 members in approximately 150 countries. Through its members, the organization is a leading authority on areas ranging from aerospace, computers and telecommunications to biomedicine, electric power and consumer electronics. The IEEE produces nearly 30 percent of the world's literature in the electrical and electronics engineering, computing and control technology fields. This nonprofit organization also sponsors or cosponsors more than 300 technical conferences each year. Additional information about the IEEE can be found at www.ieee.org.

Contacts:

For the IEEE

Karen McCabe

IEEE Marketing Manager

Phone : +1 732-562-3824

Email : k.mccabe@ieee.org

For Esterel v7 Standardization Project P1778 Workgroup

Gérard Berry

Chair of the Esterel v7 Language Reference Working Group and Chief Scientist of Esterel Technologies

Phone : +33 4 92 02 40 65

Email : Gerard.Berry@esterel-technologies.com

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